Ultra thin TCS (SiCL4) cell nitride for dram capacitor with DCS (SiH2Cl2) interface seeding layer

ABSTRACT

A method for forming silicon nitride films on semiconductor devices is provided. In one embodiment of the method, a silicon-comprising substrate is first exposed to a mixture of dichlorosilane (DCS) and a nitrogen-comprising gas to deposit a thin silicon nitride seeding layer on the surface, and then exposed to a mixture of silicon tetrachloride (TCS) and a nitrogen comprising gas to deposit a TCS silicon nitride layer on the DCS seeding layer. In another embodiment, the method involves first nitridizing the surface of the silicon-comprising substrate prior to forming the DCS nitride seeding layer and the TCS nitride layer. The method achieves a TCS nitride layer having a sufficient thickness to eliminate bubbling and punch-through problems and provide high electrical performance regardless of the substrate type. Also provided are methods of forming a capacitor, and the resulting capacitor structures.

TECHNICAL FIELD

[0001] The present invention relates to the fabrication of integratedcircuit devices, and more particularly, to methods of forming siliconnitride layers on silicon- comprising substrate surfaces, methods offorming capacitors, and to capacitor constructions.

BACKGROUND OF THE INVENTION

[0002] Silicon nitride (Si₃N₄) layers are frequently used in thefabrication of semiconductor wafers, for example, in the fabrication ofMOSFET gates, memory cells, and precision capacitors. Silicon nitridelayers are utilized as an insulation layer over silicon surfaces toelectrically isolate conductive components of a semiconductor circuitfrom one another. Silicon nitride films are also used as a diffusionbarrier to protect regions of a semiconductor wafer during localoxidation of silicon due to the slow speed with which oxygen and watervapor diffuse in the nitride. Silicon nitride dielectric films arepreferred over silicon dioxide (SiO₂) in many applications due to itshigh dielectric constant (6-9 versus about 4.2 for chemical vapordeposited (CVD) SiO₂).

[0003] Capacitors are commonly-used electrical components ofsemiconductor circuitry. A typical capacitor is constructed of twoconductive plates separated by a non-conducting dielectric layer. Thecapacitor is electrically connected to a circuit external of thecapacitor. The dielectric layer is preferably comprised of one or morematerials having a very high dielectric constant and low leakage currentcharacteristics, for example, SiO₂ and Si₃N₄, with Si₃N₄ being typicallypreferred due to its higher dielectric constant.

[0004] Silicon nitride is typically deposited upon a silicon surface(including, but not limited to, single crystal, poly, and epitaxial), bylow pressure chemical vapor deposition (LPCVD). In a conventionalsilicon nitride LPCVD deposition, the silicon surface is normallypretreated, for example, by removing the native oxide using ahydrofluoric acid (HF) clean solution. A film of silicon nitride is thendeposited on the pretreated surface by LPCVD by reacting dichlorosilane(SiH₂Cl₂) and ammonia (NH₃) over the silicon surface in a hot-wallreactor at about 600 to about 800° C. and a pressure of about 100 mTorrto about 2 Torr.

[0005] An alternate process for producing a Si₃N₄ layer is by rapidthermal nitridation (RTN) of a silicon layer which is annealed in an NH₃or other nitrogen-comprising atmosphere, which reacts with the siliconto produce silicon nitride. However, the growth of the nitride isextremely slow and self-limiting since the NH₃ is not capable ofadequately diffusing through the growing silicon nitride layer to reactwith the underlying silicon. The ultimate thickness of a silicon nitridefilm produced by nitridation is typically only 3 to 4 mm at hightemperatures. Such thickness is usually too low to adequately functionas a barrier to prevent further oxidation of the silicon surface duringsubsequent processing, or as a capacitor dielectric layer between twoconductive capacitor plates. Further, the electrical quality of thishigh temperature nitridated layer is poor.

[0006] Another described technique for formation of Si₃N₄ capacitordielectric layers is to initially nitridize an outer silicon surface toobtain a 20 to 30 angstrom thick layer, and then deposit a siliconnitride film by low pressure chemical vapor deposition of DCS. Thedrawbacks of these methods include poor electrical performance of theRTN/DCS layer and high thermal budget induced from the high temperatureRTN process.

[0007] Surface properties of the wafer surface play an important role inthe initial growth of films in thin-film processes, which will impactthe properties and structure of the thin film that is deposited.Different nucleation and deposition rates occur for the deposition ofsilicon nitride on different wafer surfaces. This leads to different ordegraded electrical characteristics of semiconductor devices havingdifferent wafer surfaces that are fabricated using a silicon nitridedeposited layer. In addition, deposition of silicon nitride alsoincludes an incubation time at the start of the deposition where thereis no apparent deposition of silicon nitride. The incubation time mayextend up to several minutes for some surfaces. Surfaces exhibiting suchdifferent rates and incubation times include, but are not limited to,one or more of tetraethylorthosilicate (TEOS), borophosphosilicate glass(BPSG), silicon, polysilicon, hemispherical grain (HSG) polysilicon,other doped silicon or polysilicon surfaces, other doped oxides, thermalsilicon dioxide, chemical vapor deposited (CVD) silicon dioxide, andplasma enhanced CVD (PECVD) silicon dioxide.

[0008] TCS nitride layers (SiCL₄ reached with NH₃) have been shown tohave much better capacitance (Cp)-leakage performance than siliconnitride layers produced by dichlorosilane (DCS) in DRAM capacitymodules. However, there have been problems with nucleation of TCSnitride on certain silicon-based surfaces such as borophosphosilicateglass (BPSG) using current TCS cell nitride processes.

[0009] An example of a prior art process for depositing a TCS siliconnitride layer in a DRAM capacity module is described with reference toFIGS. 1A-1B. Referring to FIG. 1A, an exemplary semiconductor waferfragment 10, shown in a preliminary processing step, comprises a baselayer 12, an insulative layer 14 of BPGS formed over base layer 12, anHSG polysilicon layer 16 overlying the BPSG insulative layer 14, and anopening 18. As shown in FIG. 1B, the HSG polysilicon layer 16 isincorporated into a capacitor construction 20 in which a siliconnitride-comprising dielectric layer 22 comprising a TCS nitride layer 24and a capacitor plate layer 26, are formed over the HSG polysiliconlayer 16. In a conventional process, the TCS nitride layer 24 can bedeposited over both the BPSG layer 14 and the HSG polysilicon layer 16by LPCVD by reacting silicon tetrachloride (SiCl₄) and ammonia (NH₃)over the substrate in a hot-wall reactor at about 500 to about 800° C.and a pressure of about 100 mTorr to about 2 Torr.

[0010] As depicted in FIG. 1B, transmission electron microscopy (TEM)cross-sectional images have shown that portion “A” of the TCS nitridelayer 24 deposited on the surface of the BPSG substrate 14 to becomparatively thinner (about 15 to about 20 angstroms) than thethickness of portion “B” of the TCS nitride layer 24 deposited on theHSG polysilicon substrate 18 (about 45 to about 50 angstroms).

[0011] At a thickness of less than about 20 angstroms, the nitride isnot able to prevent the polysilicon electrode from becoming oxidated inthe wet re-oxidation step that follows the cell nitride deposition.Consequently, re-oxidation results in the oxidation of the bottompolysilicon electrode. The volume expansion from the polysiliconoxidation will force the BPSG container sidewall to “bulge out” of thewafer surface. These bulges appear as “bubbling” from a top view in aScanning Electron Microscopy (SEM) image. This is commonly referred toas “BPSG bubbling” and the nitride is said to be “punched through”.These bubblings are fatal physical defects and will result in massivefail of the part. Beside preventing the BPSG bubbling problem, adesirable thickness of nitride on the BPSG also functions as a H₂barrier in the subsequent wet re-oxidation and other processes toprotect the active area in the device because H₂ could enhance borondiffusion and deactivate the transistor. The poor nucleation of TCSnitride on BPSG has limited the use of TCS nitride to below about 50angstroms in current DRAM capacity modules.

[0012] Therefore, it is desirable to develop an improved process offorming dielectric silicon nitride films with TCS that will overcome theshortcomings of present TCS nitride processes. It is also desirable toprovide an improved process to enable the production of a siliconnitride layer using TCS that will be of adequate thickness oversubstantially all silicon substrates of a device to provide the desiredcapacitor dielectric properties in a capacitor construction, and improvethe characteristics of the fabricated semiconductors devices.

SUMMARY OF THE INVENTION

[0013] The present invention provides an improved method for formingsilicon nitride films on semiconductor devices.

[0014] The present invention combines depositing a DCS nitride seedinglayer with depositing a TCS nitride layer on a silicon-comprisingsubstrate to improve the thickness of a dielectric silicon nitride layerdeposited using TCS on silicon-comprising substrates of a semiconductordevice being constructed. Before the deposition of the TCS nitride, athin layer of DCS nitride is deposited as an interface “seeding layer”on the surface of the silicon-comprising substrate for the formation ofthe TCS nitride layer such as by low pressure chemical vapor deposition(LPCVD). Advantageously, the DCS seeding layer can be deposited withouta conventionally used NH₃ pre-anneal nitridation step, by utilizing apressure of about 1-3 Torr in the reaction chamber.

[0015] In one embodiment of the method of the invention, a siliconnitride layer is formed on a surface of a silicon-comprising substrateby first depositing a DCS nitride seeding layer on the surface to athickness of up to about 5 angstroms, and then depositing a TCS siliconnitride layer on the DSC silicon nitride layer to a desired thicknessfor the application.

[0016] In another embodiment, the invention provides a method of forminga silicon nitride layer on a surface of a silicon-comprising substrateby first nitridizing the surface by exposure to a nitrogen-comprisinggas of at least one of N₂, NH₃ or NO_(x), preferably NH₃, to form atleast a monolayer of silicon nitride to a thickness of less than about 5angstroms. A DCS silicon nitride seeding layer is then deposited on thenitridated surface to a thickness of up to about 5 angstroms, and a TCSsilicon nitride layer is then deposited on the DSC silicon nitrideseeding layer to a desired thickness, typically about 40-50 angstroms orless.

[0017] In another method of the present invention, a silicon nitridelayer is formed on a surface of a silicon-comprising substrate thatincludes two or more discrete areas comprised of differentsilicon-comprising materials, for example, TEOS, BPSG, polysilicon, HSGpolysilicon, among others. A silicon nitride layer is formed on thesurface of the various silicon-comprising substrates by depositing athin DCS silicon nitride seeding layer on the surface to a thickness ofup to about 5 angstroms, and then depositing a TCS silicon nitride layeron the DSC silicon nitride layer to a desired thickness. The cross-waferthickness of the TCS silicon nitride layer is substantially equivalentover the entire substrate surface, regardless of the silicon-comprisingsubstrate.

[0018] In yet another method of the invention, the surface of two ormore discrete areas of different silicon-comprising substrates isnitridized to form at least a monolayer of silicon nitride thereon, anda silicon nitride layer is deposited on the surface of the nitridatedlayer. The silicon nitride layer is formed by depositing a DCS siliconnitride seeding layer on the nitridated layer, and then depositing a TCSsilicon nitride layer on the DSC silicon nitride layer. The cross-waferthickness of the resulting silicon nitride layer is substantiallyequivalent from area to area over the surface of the substrate.

[0019] In another aspect, the invention encompasses a method of forminga capacitor. The method includes forming a first capacitor platecomprising a silicon-comprising substrate, for example, HSG polysilicon,forming a dielectric layer of silicon nitride proximate the firstcapacitor plate, and forming a second capacitor plate over the siliconnitride layer. The silicon nitride layer is formed by first depositing athin DCS silicon nitride seeding layer of up to about 5 angstroms on thesurface of the first capacitor plate, and then depositing a TCS siliconnitride layer on the DSC silicon nitride seeding layer, to a desiredthickness, for example, about 40-50 angstroms. Preferably, the DCS andTCS silicon nitride layers are deposited by chemical vapor deposition,preferably by LPCVD.

[0020] In another method of forming a capacitor according to theinvention, a capacitor is prepared by forming a first capacitor platecomprising a silicon-comprising substrate surface such as HSGpolysilicon, a silicon nitride dielectric layer proximate the firstcapacitor plate, and a second capacitor plate over the dielectric layer.The silicon-based substrate surface of the first capacitor plate isnitridized in a nitrogen-comprising ambient, preferably NH₃, to formfrom one to three monolayers of silicon nitride on the substratesurface, preferably up to about 2 angstroms. A thin DCS silicon nitrideseeding layer of about to about 5 angstroms is then deposited on thenitridated silicon-based surface, and a TCS nitride layer is depositedon the DSC nitride layer to the desired thickness.

[0021] In another aspect, the invention provides a capacitor. Thecapacitor includes a first capacitor plate comprising asilicon-comprising substrate, a second capacitor plate, and a dielectricsilicon nitride layer intermediate the first and second capacitorplates. In a first embodiment of a capacitor according to the invention,the silicon nitride layer is composed of a thin DCS silicon nitrideseeding layer up to about 5 angstroms deposited on the first capacitorplate, and a TCS silicon nitride layer deposited on the DSC siliconnitride layer to a desired thickness.

[0022] In another embodiment, the capacitor includes a silicon nitridelayer intermediate first and second capacitor plates, the siliconnitride layer composed of a nitridized layer of silicon nitride on thesurface of the first capacitor plate, preferably up to about 2 angstromsthick or from three to less than one monolayers of silicon nitride, athin DCS nitride seeding layer of up to about 5 angstroms deposited onthe nitridated layer, and a TCS nitride layer deposited on the DSCsilicon nitride layer to a desired thickness.

[0023] Semiconductor devices fabricated with the silicon nitridedeposition method according to the present invention to provide aDCS/TCS nitride layer, have substantially the same electricalperformance as a conventional device fabricated with a silicon nitridelayer made of TCS nitride alone, and improved Cp-leakage performanceover a device made with a DCS nitride layer alone. Also, with the use ofthe DCS seeding layer, the nucleation and deposition rate of the TCSnitride component upon the substrate is substantially equivalentregardless of the silicon-comprising material that constitutes thesubstrate. This alleviates the problem of different or degradedelectrical characteristics that result from the differences in thenitride thickness deposited on adjacent surfaces. Such differences areespecially apparent, for example, between a conductor composed ofsilicon, and an insulator composed of TEOS, where a relatively thinnitride layer deposited at a silicon/TEOS edge can result in degradedelectrical properties at that edge and for the resulting fabricateddevice.

[0024] The use of the DCS/TCS nitride layer also resolves the fatal BPSGbubbling problem that occurs with TCS nitride layers that are depositeddirectly on BPSG substrates in semiconductor devices. Additionally, theelimination of a high temperature NH₃ pre-anneal step from the processconserves the thermal budget for other processes in the fabricationoperation.

BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Preferred embodiments of the invention are described below withreference to the following accompanying drawings, which are forillustrative purposes only. Throughout the following views, thereference numerals will be used in the drawings, and the same referencenumerals will be used throughout the several views and in thedescription to indicate same or like parts.

[0026]FIG. 1A is a diagrammatic cross-sectional view of a semiconductorwafer fragment at a preliminary step of a prior art processing sequence.

[0027]FIG. 1B is a view of the wafer fragment of FIG. 1A at a stepsubsequent to FIG. 1A to form a capacitor.

[0028]FIG. 2A is a diagrammatic cross-sectional view of a semiconductorwafer fragment at a preliminary step of a processing sequence to form acapacitor according to a first embodiment of the method of the presentinvention.

[0029] FIGS. 2B-2D are views of the wafer fragment of FIG. 2A atsubsequent and sequential processing steps.

[0030]FIG. 3A is a diagrammatic cross-sectional view of a semiconductorwafer fragment at a preliminary step of a processing sequence to form acapacitor according to a second embodiment of the method of the presentinvention.

[0031] FIGS. 3B-3E are views of the wafer fragment of FIG. 3A atsubsequent and sequential processing steps.

[0032] FIGS. 4A-4F are top views of SEM (scanning electron microscopy)images taken at the center of a wafer after top cell polysilicondeposition on BPSG. FIG. 4A: standard TCS deposition on BPSG. FIG. 4B:two-minute DCS seeding deposition preceding a TCS deposition. FIG. 4C:five-minute DCS seeding deposition before TCS deposition. FIG. 4D:standard DCS nitride deposition. FIG. 4E: twenty-minute NH₃ pre-annealbefore TCS deposition. FIG. 4F: twenty-minute NH₃ pre-anneal before TCSdeposition.

[0033]FIG. 5 is a graphical depiction of capacitance (Cp) versus leakageperformance of the deposited structures of FIGS. 4A-4F.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0034] The present invention encompasses methods of forming siliconnitride dielectric layers, methods of incorporating such dielectriclayers into capacitor constructions, and capacitors formed from suchmethods.

[0035] The surface of a semiconductor device being fabricated caninclude one or more of any one of the different types of surfaces asdescribed above, including but not limited to wafer surfaces such astetraethylorthosilicate (TEOS), borophosphosilicate glass (BPSG),silicon, polysilicon, HSG polysilicon, other doped silicon orpolysilicon surfaces, other doped oxides, thermal silicon dioxide,chemical vapor deposited (CVD) silicon dioxide, plasma enhanced CVD(PECVD) silicon dioxide, or any other film or surface upon which siliconnitride would be deposited in the fabrication of semiconductor devices.The method of the present invention can be utilized with regard to anyof the foregoing substrates to deposit a suitable TCS nitride layerthereon.

[0036] A first embodiment of a method of the present invention isdescribed with reference to FIGS. 2A-2D, in a method of forming acapacitor. Referring to FIG. 2A, a semiconductor wafer fragment 30 isshown at a preliminary processing step of the method of the invention,and is identical to prior art wafer fragment 10. Wafer fragment 30comprises a base layer 12, an insulative layer 14 deposited onto thebase layer 12, a silicon layer 16 overlying the insulative layer 14, andan opening 18.

[0037] An exemplary base layer 12 is, for example, a monocrystallinesilicon wafer lightly doped with a background p-type dopant. Anexemplary material for the insulative layer 14 is BPSG, and for thesilicon layer 16 is HSG polysilicon, which can be formed, for example,by converting an amorphous silicon layer deposited by on the insulativelayer by conventional methods such as chemical vapor deposition, andconverted to an HSG layer by seeding and annealing procedure, such asdescribed in U.S. Pat. Nos. 5,634,974 and 5,691,288, the disclosures ofwhich are incorporated herein by reference.

[0038] Referring to FIGS. 2A-2D, the HSG polysilicon layer 16 isincorporated into a capacitor construction 40, as a first capacitorplate layer. The silicon nitride-comprising dielectric layer 22 isformed over the BPSG insulative layer 14 and the HSG polysilicon layer16, and then a capacitor plate layer 26, for example, a CVD conductivelydoped polysilicon, is formed over the silicon nitride-comprisingdielectric layer 22.

[0039] In forming the capacitor 40, it is important to achieve a siliconnitride-comprising dielectric layer 22 having a substantially equivalentthickness over both surface types, as previously described. To achievethis according to a first embodiment of the method of the invention, aDCS nitride seeding layer 28 is deposited on to the surfaces of the BPSGinsulative layer 14 and the HSG polysilicon layer 16 prior to depositingthe TCS nitride layer 24, as shown in FIG. 2B.

[0040] Although not shown, as a preliminary step prior to depositing thesilicon nitride layer 22, it is preferred to remove any oxide that maybe formed on the surface of the wafer from exposure to oxygen. Nativeoxide that is formed on the wafer surface can be removed, for example,with an in situ oxide wet clean utilizing HF, such as by immersion in anHF solution, or by HF vapor treatment, with or without agitation orscrubbing, according to methods known to persons of ordinary skill inthe art. The HF-cleaned surface is then rinsed in deionized water anddried. Other pretreatment or cleaning processes may include the use ofNH₄F solution, NH₄F/HF solution or buffered oxide etch (BOE), or anyother cleaning solution known to one skilled in the art to provide ahydrophobic oxide free surface.

[0041] A conventional low pressure chemical vapor deposition (LPCVD)process can be used for depositing the thin DCS silicon nitride seedinglayer 28 on the wafer surface. An exemplary DCS silicon nitridedeposition by an LPCVD process can include reacting dichlorosilane(SiH₂Cl₂) and ammonia (NH₃) at a temperature of about 600° C. to about800° C., a pressure in the range of about 1500 mTorr to about 500 mTorr,with a NH₃:SiH₂Cl₂ ratio of about 3:1 to about 10:1, to deposit a thinlayer 28 of DCS silicon nitride having a thickness of up to about 5angstroms, preferably about 3 to about 8 angstroms. The seeding layercan also be made, for example, by SiH₄/NH₃ and Si₂H₆/NH₃ systems, whichare known to have good nucleation on oxide.

[0042] A preferred method for deposition of the DCS silicon nitrideseeding layer 28 is by LPCVD using dichlorosilane and ammonia. Thepreferred conditions for LPCVD include a temperature in the range ofabout 600° C. to about 800° C., a pressure in the range of about 50mTorr to about 1500 mTorr, and an NH₃:DCS ratio in the range of about3:1 to about 10: 1, preferably about 4:1 to about 6:1, to deposit alayer of about 3 angstroms to about 8 angstroms.

[0043] Referring to FIG. 2C, a TCS nitride layer 24 is then deposited onthe thin DCS seeding layer 28 to a desired thickness. A conventional lowpressure chemical vapor deposition (LPCVD) process can likewise be usedfor depositing the TCS nitride layer 24. The TCS nitride depositionprocess can be performed, for example, by the reaction of silicontetrachoride (SiCl₄) and ammonia (NH₃) at a temperature of about 500° C.to about 800° C., a pressure in the range of about 50 mTorr to about1500 mTorr, with a NH₃:SiCl₄ ratio of about 2:1 to about 1:2 to deposita TCS silicon nitride layer to a thickness of up to about 50 angstroms,preferably about 45 to about 55 angstroms.

[0044] A preferred method for deposition of the TCS silicon nitridelayer 24 is by LPCVD using silicon tetrachloride and ammonia. Thepreferred conditions for LPCVD include a temperature in the range ofabout 500° C. to about 800° C., a pressure in the range of about 50mTorr to about 1500 mTorr, and an NH₃:TCS ratio in the range of about10:1 to about 1:2, preferably about 2:1 to about 1:2, to deposit a layerof about 3 angstroms to about 8 angstroms.

[0045] The method of the invention results in a silicon nitride layerhaving a resultant thickness of up to about 50 angstroms and reducedleakage current characteristics. Preferably, the total thickness of thedielectric silicon nitride-comprising layer 22 is about 40 to about 60angstroms, preferably about 45 to about 55 angstroms.

[0046] Although LPCVD and the stated conditions are preferred, it isunderstood that conventional silicon nitride deposition processes otherthan LPCVD, can also be used to deposit suitable DCS and TCS siliconnitride layers. For example, such processes can include physicaldeposition processes, plasma enhanced chemical vapor depositionprocesses, and rapid thermal chemical vapor deposition processes, amongothers.

[0047] Systems for wafer pretreatment and silicon nitride deposition arewell known to those skilled in the art, as described, for example, isU.S. Pat. No. 5,939,333, the disclosure of which is incorporated hereinby reference. In an exemplary system for the silicon nitride formationprocess shown in FIGS. 3A-3E, the wafer surfaces may be pretreated insitu with respect to the silicon nitride formation step with an HFclean, such as an HF vapor clean in an HF vapor module (not shown). Withsuch a system, the wafers are transferred from the pretreatment unit bya wafer transfer module to an LPCVD module (not shown) for the DCS andTCS silicon nitride deposition, without exposure to air to preventnative oxide formation. The wafers are then be positioned and sealed inthe deposition chamber, whereupon heating elements bring the temperatureof the chamber to about 640° C. to 800° C. Utilizing a pump, the systemis then pumped down to a pressure of about 10 mTorr or less after whichthe deposition chamber is purged using N₂ or other inert gas. The systemis then pumped down to a pressure of about 10 mTorr or less after whichan NH₃ prepurge is performed during which the pressure is in the rangeof about 50 mTorr to about 700 mTorr. The DCS nitride deposition is thenperformed in accordance with conventional LPCVD processes according tothe method and conditions described herein. Following the deposition ofthe DCS nitride layer, the deposition chamber is purged with NH₃ duringwhich the pressure is in the range of about 50 mTorr to about 700 mTorr.

[0048] For the TCS nitride deposition, the system is then pumped down toa pressure of about 10 mTorr or less, the deposition chamber is purgedwith N₂ or other inert gas, and the system is pumped down again to apressure of about 10 mTorr or less. An NH₃ prepurge is then performedduring which the pressure is in the range of about 50 mTorr to about 700mTorr. The TCS nitride deposition is performed in accordance with theconventional LPCVD process according to the method and conditionsdescribed herein. Following the deposition of the TCS nitride layer, thedeposition chamber is purged with NH₃ during which the pressure is inthe range of about 50 mTorr to about 700 mTorr, and then the system ispumped down to a pressure of about 10 mTorr or less. The depositionchamber is then vented to atmosphere using N₂ or other inert gas.

[0049] Referring now to FIGS. 3A-3E, a second embodiment of the methodof the invention is described in a method of forming a capacitor 70.Referring to FIG. 3A, a semiconductor wafer fragment 60, identical toprior art wafer fragment 10 and wafer fragment 30, comprises a baselayer 12, an insulative layer 14 deposited on a surface of the baselayer 12, a silicon layer 16 overlying the insulative layer 14, and anopening 18. In an exemplary wafer fragment 60, the insulative layer 14is BPSG, and the silicon layer 16 is HSG polysilicon. The HSGpolysilicon layer 16 is incorporated into a capacitor construction 70,as a first capacitor plate layer. A silicon nitride-comprisingdielectric layer 22 is formed intermediate the HSG polysilicon layer 16and a second capacitor plate layer 26 (FIG. 3E).

[0050] According to the method, the surfaces of the BPSG layer 14 andthe HSG polysilicon layer 16 are nitridized prior to the deposition ofthe DCS nitride seeding layer 28 and the TCS nitride layer 24. Thenitridation of the BPSG layer 14 and the HSG polysilicon layers 16,increases the number of nucleation sites and nucleation rate for thesubsequently deposited DCS nitride seeding layer 28.

[0051] The deposition of the silicon nitride-comprising layer using thenitridation step in accordance with the second embodiment of theinvention is performed in substantially the same manner as describedwith respect to FIGS. 2A-2D with the addition of the nitridation step asshown in FIG. 3B. Therefore, the following description with reference toFIGS. 3A-3E will be limited to the nitridation step.

[0052] Referring to FIG. 3B, a thin silicon nitride layer 22 is formedover the BPSG layer 14 and the HSG polysilicon layers 16 by conventionalnitridation methods typically used for forming a layer of siliconnitride on an oxide-free wafer surface. Such conventional methodstypically include growing a silicon nitride film on a silicon-comprisingsurface by exposing the surface to a nitrogen-comprising ambient. Thenitrogen-comprising atmosphere may comprise N₂, NH₃ or NO_(x), alone orin mixtures of two or more. Further, the nitrogen-comprising atmospheremay consist essentially of a gas selected from the group consisting ofN₂, NH₃ or NO_(x), and mixtures thereof. An exemplary nitridizingprocess comprises rapid thermal nitridation (RTN) of a silicon layer ina nitrogen-comprising atmosphere at a temperature of about 900° C. toabout 1300° C., and a pressure of about 100 Torr to about 760 Torr.

[0053] Preferably, the BPSG layer 14 and the HSG polysilicon layers 16are exposed to an atmosphere comprising ammonia (NH₃), at a temperatureof about 500° C. to about 750° C. and a pressure of about 50 Torr toabout 200 Torr to form a silicon nitride-comprising layer 22 to athickness of less than three monolayers of silicon nitride, preferablyone monolayer of silicon nitride, or up to about 2 angstroms, preferablyup to about 5 angstroms.

[0054] Systems for nitridation of a silicon-comprising surface are wellknown in the art. In an exemplary system for nitridation of the wafersurface, the surfaces may be pretreated as discussed herein, forexample, with an HF clean, and transferred to a conventional LPCVDmodule. The temperature of the chamber is brought up to about 400° C. toabout 600° C. After pumping down the system to a pressure of about 1mTorr to about 10 mTorr., the nitridation process is performed in anatmosphere of at least one of N₂, NH₃ or NO_(x).

[0055] Below about 500° C., the surface coverage is typically amonolayerof silicon nitride, independent of temperature, although the timerequired to achieve the monolayer increases as temperature decreases. Atabout 550° C. to about 600° C., the surface typically exceeds amonolayer, and at about 600° C., the surface coverage may approach adouble layer of silicon nitride. Suitable nitridation of the siliconbased surfaces results in less than three monolayers of silicon nitrideformation and preferably one monolayer or less.

[0056] After the nitridation of the BPSG layer 14 and the HSGpolysilicon layers 16, the system is then pumped down to a pressure ofabout 10 mTorr or less, followed by an NH₃ prepurge during which thepressure is in the range of about 50 mTorr to about 700 mTorr. Theprepurge is then followed by the remainder of the steps to deposit theDCS nitride seeding layer 28 and the TCS nitride layer 24, asillustrated in FIGS. 3C-3D, and described with reference to FIGS. 2B-2C,to complete the silicon nitride deposition process.

[0057] Deposition of the DCS nitride seeding layer 28 preferablyprovides a thin layer of less than about 5 angstroms, preferably about3-8 angstroms. The cross-wafer thickness of the TCS nitride layer 24 issubstantially equivalent over the different wafer surfaces, i.e., theBPSG portion 14 and the HSG polysilicon portion 16, which results inimproved electrical characteristics and mechanical properties for thesemiconductor device being fabricated. Typically, the thickness of theTCS nitride layer can range from about 40 to about 60 angstroms.

[0058] The present invention is beneficial for all thin dielectricapplications applications utilizing silicon nitride films. Suchapplications include, for example, the dielectrics for memory cells andgate dielectrics, among others. As such, the foregoing configurationsare purely for illustration only and are not to be taken as limiting tothe present invention as defined by the accompanying claims.

EXAMPLE

[0059] DCS nitride and TCS nitride were deposited, alone and incombination, on a BPSG substrate to compare the measured thicknesses ofthe nitride layer and Cp-leakage performance.

[0060] There was a 10-minute NH₃ pre-anneal before the DCS seeding layerdeposition. The time period of the NH₃ pre-anneal included a ramp-uptime from 300° C. to 800° C. The DCS and TCS nitride depositions were atabout 640° C. with pressure of 0.15 Torr and 0.2 Torr, respectively.After the cell nitride deposition, all wafers went through a standardwet re-oxidation (750° C., 105 Å target on Si blank test wafer).

[0061] The experimental details and results are shown below in Table 1and depicted in FIGS. 4A-4F and FIG. 5. The results show that thedeposition of a silicon nitride layer utilizing a DCS nitride seedinglayer for TCS nitride offers the same electrical performance as a TCSnitride layer, and solves the “bubbling” problem of deposition of TCSnitride on BPSG in DRAM devices. TABLE 1 Nitride layer Amount of GroupExperimental nitride deposition Thickness bubbling No. on BPSG FIG. (Å)of BPSG 1 Standard TCS nitride 4A 51 Severe 2 2 minute DCS seedingbefore 4B 51 None the TCS deposition (29.6 mins.) 3 5 minute DCS seedingbefore 4C 48 None the TCS deposition (25.6 mins.) 4 5 minute DCS seedingbefore 52 None the TCS deposition (29.6 mins.) 5 5 minute DCS seedingbefore 55 None the TCS deposition (33.6 mins.) 6 DCS standard cellnitride 4D 56 None 7 20 minute NH₃ pre-anneal before 4E 52 Slight theTCS deposition 8 20 minute NH₃ pre-anneal before 4F 47 Slight the TCSdeposition

[0062]FIG. 4A depicts a standard TCS deposition resulting in a nitridethickness of 51 Å at the edge of the wafer and severe “bubbling” of theBPSG at the center of a wafer.

[0063] In order overcome such shortcomings of a TCS nitride layer onBPSG, a deposition process was performed by combining the DCS nitridewith the TCS nitride. In one run, before the deposition of TCS nitride,a very thin DCS nitride was deposited as an interface seeding layer.This process produced a TCS+DCS nitride layer having a thickness of 51 Åand 48 Å across the whole surface of the wafer without “bubbling” of theBPSG (FIGS. 4B and 4C).

[0064]FIG. 4D depicts a DCS standard nitride layer that is 56 Å thickwith no bubbling of the BPSG.

[0065]FIGS. 4E and 4F illustrate “bubbling” of the BPSG with nitridelayers 52 Å and 47 Å thick that were formed with a 20-minute NH₃pre-anneal before the TCS nitride deposition. These results show thatthe use of a DCS nitride seeding layer was more effective thanincreasing the NH₃ pre-anneal time.

[0066] The results also showed that Cp-leakage performance of a TCSnitride layer that included a DCS seeding layer was much better than aDCS nitride layer alone and comparable to a TCS nitride layer alone.This indicated that DCS nitride seeding layer functioned as an interfacelayer to improve the surface condition for TCS nitride on BPSG withoutsubstantially decreasing the superior electrical properties of theoverall nitride film.

[0067]FIG. 5 is a graphical comparison of Cp-leakage for the TCS nitridelayer combined with a DCS seeding layer and deposited on BPSG, and forthe standard DCS nitride layer and standard TCS nitride layer, in TELfast ramp furnace for a 9I short loop lot. The process details of eachgroup is listed in Table 1, above. The data in FIG. 5 shows that all TCSnitride test groups were better than the DCS standard nitride, and theTCS nitrides with DCS seeding layer were comparable to the pure TCSnitride film.

[0068] In compliance with the statute, the invention has been describedin language more or less specific as to structural and methodicalfeatures. It is to be understood, however, that the invention is notlimited to the specific features shown and described, since the meansherein disclosed comprise preferred forms of putting the invention intoeffect. Although the invention has been described with particularreference to preferred embodiments thereof, variations and modificationsof the present invention can be made within a contemplated scope of thefollowing claims as is readily known to one skilled in the art. Theinvention is, therefore, claimed in any of its forms or modificationswithin the proper scope of the appended claims appropriately interpretedin accordance with the doctrine of equivalents.

What is claimed is:
 1. A method of forming a silicon nitride layer on asilicon-comprising substrate, comprising the steps of: exposing asurface of the substrate to a gas mixture of dichlorosilane and anitrogen-comprising gas to deposit a first layer of silicon nitride onthe surface of the substrate, the first layer having an exposed surface;and exposing the exposed surface of the first layer to a gas mixture ofsilicon tetrachloride and a nitrogen-comprising gas to deposit a secondlayer of silicon nitride of a desired thickness on the exposed surfaceof the first layer.
 2. The method of claim 1, wherein the first siliconnitride layer has a thickness of up to about 5 angstroms.
 3. The methodof claim 1, wherein the second silicon nitride layer has a thickness ofabout 40-50 angstroms.
 4. The method of claim 1, wherein thenitrogen-comprising gas is N₂, NH₃ or NO_(x), or a mixture thereof. 5.The method of claim 1, wherein the nitrogen-comprising gas is NH₃. 6.The method of claim 1, wherein the first silicon nitride layer is formedby low pressure chemical vapor deposition to a thickness of less thanabout 5 angstroms; and the second silicon nitride layer is formed by lowpressure chemical vapor deposition to a thickness of up to about 50angstroms.
 7. A method of forming a silicon nitride layer on asilicon-comprising substrate, comprising the steps of: exposing asurface of the substrate to a gas mixture of dichlorosilane and anitrogen-comprising gas to deposit a first layer of silicon nitride onthe surface of the substrate, the first silicon nitride layer having anexposed surface and a thickness of up to about 5 angstroms; and exposingthe exposed surface of the first layer to a gas mixture of silicontetrachloride and a nitrogen-comprising gas to deposit a second layer ofsilicon nitride having a thickness of about 40 to about 50 angstroms onthe exposed surface of the first layer.
 8. A method of forming a siliconnitride layer on a silicon-comprising substrate comprising at least twodiscrete areas of silicon-comprising materials having a differentsurface nucleation rate for silicon tetrachloride in a chemical vapordeposition to form a silicon nitride layer thereon, the methodcomprising the steps of: exposing a surface of the substrate to a gasmixture of dichlorosilane and a nitrogen-comprising gas to deposit afirst layer of silicon nitride on the surface of the substrate, thefirst layer having an exposed surface; exposing the exposed surface ofthe first layer to a gas mixture of silicon tetrachloride and anitrogen-comprising gas to deposit a second layer of silicon nitride ofa desired thickness on the exposed surface of the first layer wherebythe cross-substrate thickness of the second silicon nitride layer issubstantially equivalent.
 9. The method of claim 8, wherein a first areaof the silicon-comprising substrate comprises an insulative materialselected from the group consisting of tetraethylorthosilicate,borophosphosilicate glass, and silicon dioxide; and a second area of thesilicon-comprising substrate comprises a silicon material selected fromthe group consisting of silicon, polysilicon, hemispherical grainpolysilicon, a doped silicon, and a doped polysilicon.
 10. A method offorming a silicon nitride-comprising layer, comprising the steps of:forming a first silicon nitride layer over a surface of the substrate bychemical vapor deposition of dichlorosilane to a thickness of up toabout 5 angstroms, the first layer having an exposed surface; andforming a second silicon nitride layer over the exposed surface of thefirst layer by chemical vapor deposition of silicon tetrachloride to athickness of about 40 to about 50 angstroms; the first and second layerstogether forming the silicon nitride-comprising layer.
 11. A method ofsemiconductive wafer processing, comprising depositing a siliconnitride-comprising layer over a surface of a semiconductive wafer, thedepositing comprising the steps of: depositing a first portion of thesilicon nitride-comprising layer of less than about 5 angstroms on thesurface of the wafer, utilizing a mixture of dichlorosilane and anitrogen-comprising gas, the first portion of the layer having anexposed surface; and depositing a second portion of the silicon nitridelayer of up to about 50 angstroms on the exposed surface of the firstportion of the layer, utilizing a mixture of silicon tetrachloride and anitrogen-comprising gas.
 12. A method of forming a silicon nitride layeron a silicon-comprising substrate, comprising the steps of: nitridizingthe surface of the substrate by exposing the substrate to anitrogen-comprising gas to form a first layer of silicon nitride on thesurface of the substrate, the first layer having an exposed surface;exposing the exposed surface of the first layer to a gas mixture ofdichlorosilane and a nitrogen-comprising gas to deposit a second layerof silicon nitride on the exposed surface of the first layer, the secondlayer having an exposed surface; and exposing the exposed surface of thesecond layer to a gas mixture of silicon tetrachloride and anitrogen-comprising gas to deposit a third layer of silicon nitride of adesired thickness on the exposed surface of the second layer.
 13. Themethod of claim 12, wherein the nitridizing comprises rapid thermalnitridation at a temperature of about 700-1000° C., and a pressure ofabout 100-760 mTorr to a thickness of up to about 5 angstroms.
 14. Amethod of forming a silicon nitride layer on a silicon-comprisingsubstrate, comprising the steps of: nitridizing a surface of thesubstrate by exposing the surface to a nitrogen-comprising gas to form afirst layer of silicon nitride on the surface of the substrate; thefirst silicon nitride layer having an exposed surface and a thickness ofup to about 5 angstroms; exposing the exposed surface of the first layerto a gas mixture of dichlorosilane and a nitrogen-comprising gas todeposit a second layer of silicon nitride on the exposed surface of thefirst layer, the second silicon nitride layer having an exposed surfaceand a thickness of up to about 5 angstroms; and exposing the exposedsurface of the second layer to a gas mixture of silicon tetrachlorideand a nitrogen-comprising gas to deposit a third layer of siliconnitride on the exposed surface of the second layer, the third siliconnitride layer having a thickness of up to at about 50 angstroms.
 15. Themethod of claim 14, wherein the surface of the semiconductive wafercomprises at least two portions of silicon-comprising materials havingdifferent surface nucleation rates for silicon tetrachloride in anitrogen-comprising gas to form a silicon nitride layer thereon; and thethickness of the third silicon nitride layer is substantially equivalentover each of the areas of the silicon-comprising substrate.
 16. A methodof forming a silicon nitride layer on a silicon-comprising substratecomprising at least two discrete areas of silicon-comprising materialshaving a different surface nucleation rate for silicon tetrachloride ina chemical vapor deposition to form a silicon nitride layer thereon, themethod comprising the steps of: nitridizing a surface of the substrateby exposing the surface to a nitrogen-comprising gas to form a firstlayer of silicon nitride on the surface of the substrate, the firstsilicon nitride layer having an exposed surface; exposing the exposedsurface of the first layer to a gas mixture of dichlorosilane and anitrogen-comprising gas to deposit a second layer of silicon nitride onthe exposed surface of the first layer, the second silicon nitride layerhaving an exposed surface; and exposing the exposed surface of thesecond layer to a gas mixture of silicon tetrachloride and anitrogen-comprising gas to deposit a third layer of silicon nitride of adesired thickness on the surface of the exposed surface of the secondlayer, whereby the thickness of the third silicon nitride layer issubstantially equivalent over each of the areas of thesilicon-comprising substrate.
 17. The method of claim 16, wherein afirst area of the silicon-comprising substrate comprises an insulativematerial selected from the group consisting of tetraethylorthosilicate,borophosphosilicate glass, and silicon dioxide; and a second area of thesilicon-comprising substrate comprises a silicon material selected fromthe group consisting of silicon, polysilicon, hemispherical grainpolysilicon, a doped silicon, and a doped polysilicon.
 18. A method offorming a silicon nitride-comprising layer on a silicon-comprisingsubstrate, comprising the steps of: nitridizing a surface of thesilicon-comprising substrate to form a first silicon nitride layerhaving an exposed surface and a thickness of less than about 5angstroms; forming a second silicon nitride layer over the exposedsurface of the first layer by chemical vapor deposition ofdichlorosilane to a thickness of up to about 5 angstroms, the secondsilicon nitride layer having an exposed surface; and forming a thirdsilicon nitride layer over the exposed surface of the second layer bychemical vapor deposition of silicon tetrachloride to a thickness ofabout 40 to about 50 angstroms; the first, second and third layerstogether forming the silicon nitride-comprising layer.
 19. A siliconnitride deposition method, comprising the steps of: providing asilicon-comprising substrate; nitridizing a surface of the siliconsubstrate to form a layer of silicon nitride having a thickness of up toabout 5 angstroms, the nitridized layer having an exposed surface;forming a silicon nitride-comprising layer on the exposed surface of thenitridized layer by a first chemical vapor deposition of dichlorosilaneto form a first silicon nitride layer on the exposed surface of thenitridized layer, the first silicon nitride layer having an exposedsurface and a thickness of 5 angstroms or less; and a second chemicalvapor deposition of silicon tetrachloride to form a second siliconnitride layer on the exposed surface of the first layer, the secondlayer having a thickness of up to about 50 angstroms; the first andsecond layers forming the silicon nitride-comprising layer.
 20. A methodof semiconductive wafer processing, comprising forming a siliconnitride-comprising layer over a surface of a semiconductive wafer, theforming comprising the steps of: forming a first portion of the siliconnitride-comprising layer of less than about 5 angstroms by nitridizingthe surface of the semiconductive wafer, the first layer portion havingan exposed surface; depositing a second portion of the siliconnitride-comprising layer of less than about 5 angstroms on the exposedsurface of the first layer portion, utilizing a mixture ofdichlorosilane and a nitrogen-comprising gas, the second layer portionhaving an exposed surface; and depositing a third portion of the siliconnitride-comprising layer of up to about 50 angstroms on the exposedsurface of the second layer portion utilizing a mixture of silicontetrachloride and a nitrogen-comprising gas.
 21. A method of forming acapacitor, comprising the steps of: forming a silicon nitride-comprisinglayer over a surface of a first capacitor plate by depositing a firstlayer of the silicon nitride-comprising layer of less than about 5angstroms on the surface of the capacitor plate, utilizing a mixture ofdichlorosilane and a nitrogen-comprising gas, the first layer having anexposed surface; and depositing a second layer of the siliconnitride-comprising layer of up to about 50 angstroms on the exposedsurface of the first layer, utilizing a mixture of silicon tetrachlorideand a nitrogen-comprising gas, the second layer having an exposedsurface; and forming a second capacitor plate over exposed surface ofthe second silicon nitride layer.
 22. A method of forming a capacitor,comprising the steps of: forming a first capacitor plate layercomprising a conductively doped polysilicon; forming a siliconnitride-comprising layer over a surface of the first capacitor plate bydepositing a first silicon nitride layer by low pressure chemical vapordeposition of dichlorosilane and one or more nitrogen-comprising gasesto a thickness of less than about 5 angstroms on the surface of thecapacitor plate, the first layer having an exposed surface; anddepositing a second silicon nitride layer by low pressure chemical vapordeposition of silicon tetrachloride and one or more nitrogen-comprisinggases to a desired thickness on the exposed surface of the first layer,the second layer having an exposed surface; and forming a secondcapacitor plate layer over the exposed surface of second silicon nitridelayer.
 23. A method of forming a capacitor, comprising the steps of:forming a first capacitor plate having a surface; forming a siliconnitride-comprising layer proximate the first capacitor plate by chemicalvapor depositing dichlorosilane over the surface of the first capacitorplate to form a first silicon nitride layer of less than about 5angstroms, the first layer having an exposed surface; and chemical vapordepositing silicon tetrachloride over the exposed surface of the firstlayer to form a second silicon nitride layer having an exposed surfaceand a desired thickness; and forming a second capacitor plate layer overthe exposed surface of the second layer and proximate the siliconnitride-comprising layer.
 24. A method of forming a capacitor,comprising the steps of: forming a first capacitor plate having anexposed surface comprising at least two discrete areas ofsilicon-comprising materials having a different surface nucleation ratefor silicon tetrachloride in a chemical vapor deposition to form asilicon nitride layer thereon; forming a silicon nitride-comprisinglayer proximate the first capacitor plate by chemical vapor depositingdichlorosilane over the exposed surface of the first capacitor plate toform a first silicon nitride layer of less than about 5 angstroms, thefirst layer having an exposed surface; and chemical vapor depositingsilicon tetrachloride onto the exposed surface of the first layer toform a second silicon nitride layer of a desired thickness, the secondlayer having an exposed surface; whereby the silicon nitride-comprisinglayer comprises the first and second layers and has a thickness that issubstantially equivalent cross-wise over the surface of the firstcapacitor plate; and forming a second capacitor plate layer over theexposed surface of the second layer, proximate the siliconnitride-comprising layer.
 25. A method of forming a capacitor,comprising the steps of: forming a silicon nitride-comprising layer overa surface of a first capacitor plate by nitridizing the surface of thecapacitor to form a first silicon nitride layer of less than about 5angstroms, the first layer having an exposed surface; depositing asecond layer of the silicon nitride-comprising layer of less than about5 angstroms onto the exposed surface of the layer utilizing a mixture ofdichlorosilane and a nitrogen-comprising gas, the second layer having anexposed surface; and depositing a third layer of the siliconnitride-comprising layer of up to about 50 angstroms onto the exposedsurface of the second layer utilizing a mixture of silicon tetrachlorideand a nitrogen-comprising gas, the third layer having an exposedsurface; and forming a second capacitor plate over the exposed surfaceof the third silicon nitride layer.
 26. A method of forming a capacitor,comprising the steps of: forming a first capacitor plate layercomprising a conductively doped polysilicon; forming a siliconnitride-comprising layer over a surface of the first capacitor plate bynitridizing the surface of the first capacitor plate to form a firstsilicon nitride layer of less than about 5 angstroms, the first layerhaving an exposed surface; depositing a second silicon nitride layeronto the exposed surface of the first layer by low pressure chemicalvapor deposition of dichlorosilane and one or more nitrogen-comprisinggases to a thickness of less than about 5 angstroms, the second layerhaving an exposed surface; and depositing a third silicon nitride layeronto the exposed surface of the second layer by low pressure chemicalvapor deposition of silicon tetrachloride and one or morenitrogen-comprising gases to a desired thickness, the third layer havingan exposed surface; and forming a second capacitor plate layer over theexposed surface of the third silicon nitride layer.
 27. A method offorming a capacitor, comprising the steps of: forming a first capacitorplate having a silicon-comprising surface; forming a siliconnitride-comprising layer proximate the first capacitor plate bynitridizing the surface of the first capacitor plate to form a firstsilicon nitride layer of less than about 5 angstroms, the first layerhaving an exposed surface; chemical vapor depositing dichlorosilane overthe exposed surface of the first layer to form a second silicon nitridelayer of less than about 5 angstroms, the second layer having an exposedsurface; and chemical vapor depositing silicon tetrachloride over theexposed surface of the second layer to form a silicon nitride layer of adesired thickness; and forming a second capacitor plate layer proximatethe silicon nitride-comprising layer.
 28. A method of forming acapacitor, comprising the steps of: forming a first capacitor platehaving an exposed surface comprising at least two discrete areas ofsilicon-comprising materials having a different surface nucleation ratefor silicon tetrachloride in a chemical vapor deposition to form asilicon nitride layer thereon; forming a silicon nitride-comprisinglayer proximate the first capacitor plate by nitridizing the exposedsurface of the first capacitor plate to form a first silicon nitridelayer having a thickness of less than about 5 angstroms, the first layerhaving an exposed surface; chemical vapor depositing dichlorosilane overthe exposed surface of the first layer to form a second silicon nitridelayer having a thickness of less than about 5 angstroms, the secondlayer having an exposed surface; and chemical vapor depositing silicontetrachloride over the exposed surface of the second layer to form athird silicon nitride layer of a desired thickness; whereby the combinedthicknesses of the first, second and third layers provides the siliconnitride-comprising with a thickness that is substantially equivalentcross-wise over the surface of the first capacitor plate; and forming asecond capacitor plate layer proximate the silicon nitride-comprisinglayer.
 29. A capacitor, comprising: a first capacitor plate having anexposed silicon-comprising surface; a silicon nitride-comprising layerproximate the first capacitor plate comprising a first silicon nitridelayer of chemical vapor deposited dichlorosilane of less than about 5angstroms over the exposed surface of the first capacitor plate, thefirst layer having an exposed surface; and a second silicon nitridelayer of chemical vapor deposited silicon tetrachloride over the exposedsurface of the first layer and having a predetermined thickness; and asecond capacitor plate layer proximate the silicon nitride-comprisinglayer.
 30. A capacitor, comprising: a first capacitor plate having anexposed silicon-comprising surface comprising at least two discreteareas of silicon-comprising materials having a different surfacenucleation rate for silicon tetrachloride in a chemical vapor depositionto form a silicon nitride layer thereon; a silicon nitride-comprisinglayer proximate the first capacitor plate comprising a first siliconnitride layer of chemical vapor deposited dichlorosilane over theexposed surface of the first capacitor plate, the first layer having aexposed surface and a thickness of less than about 5 angstroms; and asecond silicon nitride layer of chemical vapor deposited silicontetrachloride over the exposed surface of the first layer, the secondlayer having a predetermined thickness; whereby the thickness of thesilicon tetrachloride nitride layer is substantially equivalentcross-wise over the surface of the first capacitor plate; and a secondcapacitor plate layer proximate the silicon nitride-comprising layer.31. A capacitor, comprising: a first capacitor plate having an exposedsilicon-comprising surface; a silicon nitride-comprising layer proximatethe first capacitor plate comprising a nitridized first layer of siliconnitride on the exposed surface of the first capacitor plate, the firstlayer having an exposed surface and a thickness of less than about 5angstroms; a second silicon nitride layer of chemical vapor depositeddichlorosilane over the exposed surface of the first layer, the secondlayer having an exposed surface and a thickness of less than about 5angstroms; and a third silicon nitride layer of chemical vapordepositing silicon tetrachloride over the exposed surface of the secondlayer, the third surface having a predetermined thickness; and a secondcapacitor plate layer proximate the silicon nitride-comprising layer.32. A capacitor, comprising: a first capacitor plate having an exposedsilicon-comprising surface comprising at least two discrete areas ofsilicon-comprising materials having a different surface nucleation ratefor silicon tetrachloride in a chemical vapor deposition to form asilicon nitride layer thereon; a silicon nitride-comprising layerproximate the first capacitor plate comprising a nitridized first layerof silicon nitride of less than about 5 angstroms on the exposed surfaceof the first capacitor plate, the first layer having an exposed surface;a second silicon nitride layer of chemical vapor depositeddichlorosilane over the exposed surface of the first layer, the secondlayer having an exposed surface and a thickness of less than about 5angstroms; and a third silicon nitride layer of chemical vapor depositedsilicon tetrachloride over the exposed surface of the second layer, thethird surface having a predetermined thickness; whereby the thickness ofthe silicon tetrachloride nitride third layer is substantiallyequivalent crosswise over the surface of the first capacitor plate; anda second capacitor plate layer proximate the silicon nitride-comprisinglayer.